"BSIM3v3 Manual"(Final Version), Yuhua Cheng, Mansun Chan, Kelvin Hui, Min-chie Jeng, Zhihong Liu, Jianhui Huang, Kai Chen, James Chen, Robert Tu, Ping K. Ko, Chenming Hu
Department of Electrical Engineering and Computer Sciences
University of California, Berkeley, CA 94720

"MOS Scaling: Transistor Challenges for the 21st Century", Scott Thompson, Paul Packan, Mark Bohr, Intel Corp.

 "RF CMOS Models" - Enablers for Portable Communication SoCs
By Xisheng Zhang, Director of Technology, BTA Technology Inc., Santa Clara, Calif., Planet Analog Oct 24, 2000 (7:36 AM)

"A Simple and Pretty Accurate MOS Model for Hand Calculations", Matthijs Pardoen., march 1999, rfsilicon.com  

 "Compact Modeling of Drain and Gate Current Noise for RF CMOS", R. van Langevelde et al., IEDM 2003 Technical Digest, pp. 867-870, 2003 (259kB).

 "Noise Modeling for RF CMOS Circuit Simulation", A.J. Scholten et al., IEEE Trans. Electron Devices, Vol. ED-50, pp. 618-632, 2003 (810kB).

 "Compact Modeling of Drain and Gate Current Noise for RF CMOS",  A.J. Scholten et al., IEDM 2002 Technical Digest, pp. 129-132, 2002 (442kB).

 "Gate current: Modeling, DL extraction and impact on RF performance", R. van Langevelde et al., IEDM 2001 Technical Digest, pp. 289-292, 2001 (265kB).

 "RF-CMOS performance trends", P.H. Woerlee et al., IEEE Trans. Electron Devices, Vol. ED-48, pp. 1776-1782, 2001 (160kB).

 "RF-Distortion in deep sub-micron CMOS technologies", R. van Langevelde et al., IEDM 2000 Technical Digest, pp. 807-810, 2000 (259kB).

 "Efficient parameter extraction techniques for a new surface-potential-based MOS model for RF applications", W. Liang et al., Proceedings ICMTS 2001, pp. 141-145, 2001 (327kB).

  "Accurate thermal noise model for deep sub-micron CMOS", A.J. Scholten et al., IEDM 1999 Technical Digest, pp. 155-158, 1999 (264kB).

 "Accurate drain conductance modeling for distortion analysis in MOSFETs", R. van Langevelde and F.M. Klaassen, IEDM 1997 Technical Digest, pp. 313-317, 1997 (362kB).

 "Effect of gate-field dependent mobility degradation on distortion analysis in MOSFET's", R. van Langevelde and F.M. Klaassen, IEEE Trans. Electron Devices, Vol. ED-44, pp. 2044-2052, 1997 (264kB).

 "90 nm Node CMOS Technology Comparison between INTEL Corporation and SAMSUNG Electronics", Min Chin Chai, 2003, http://shay.ecn.purdue.edu/~ee612/2003fp/Chai612.pdf.

"The transistor, with emphasis on its use for radio frequency telecommunication.", Linköping Studies in Science and Technology. Dissertation No. 508, 1998. Presented at LiTH, February 13, 1998.